Hi,
This is in reference to your profile in our database.
Our Client Mentor Graphics,Noida is currently hiring for professionals :
Website- www.mentor.com
Job Qualifications:
- Good knowledge of
o RTL Design, Synthesis, Optimization and design flows
o HDLs: Verilog/VHDL/system verilog
o Tools Xilinx(XST/ISE), Altera(QuartusII), Precision, Synplify, DC-shell etc.
- Good to have knowledge of
o Scripting Language: Perl, C-shell etc.
o Simulation tools (Verilog -XL NC-Verilog, modelsim, VCS etc.)
Description:
Validation and benchmarking of synthesis tool. The candidate would be working on complete FPGA design flow starting from design and constraints entry to synthesis tool and to take the design till PnR. Candidate would benchmark the Mentor synthesis tool against other tools and thus need to have good analytical capabilities and understanding of optimization flows.
In case you are interested in exploring this opportunity
OR any other opportunity in EDA/Semi conductor Domain, please share your
updated profile with the following details-
Your Current CTC-
Expected CTC-
Current Location-
Location Preference-
Look forward to your response.
Regards
AddEdge Consulting
www.addedgeconsulting.com
